Tackling the Power Problem of Chips Through Design, Manufacturing, and Use
Experts from Germany and Taiwan Discuss Solutions for Energy Efficiency in the Semiconductor Industry
The escalating energy demands of the semiconductor industry and its products were the central focus of a recent discussion at the Saxony-Taiwan Science Conference on September 30, featuring a panel of experts: Dr. Frank Ellinger, Head of Chair for Circuit Design and Network Theory at Technical University of Dresden, National Cheng Kung University assistant professor Dr. Philex Fan, and Dr. Harald Kuhn, Professor at University of Technology Chemnitz. The conversation, moderated by Frank Bosenberg, managing director of Silicon Saxony, Europe’s leading microelectronics and ICT cluster, covered solutions spanning from advanced chip design and architecture to manufacturing processes, emphasizing the critical need for innovation and international cooperation.
The Urgent Need for Efficiency
The topic of the panel, “Conserving Energy in Semiconductor Production Design, and Use”, is absolutely timely. It is forecast that by 2030, a staggering 27% of total energy will be consumed by information and communication technologies. Since chips are the primary energy consumers in this sector, decreasing their power consumption is a major economic and ecological imperative.
Design-Level Solutions: Adaptivity and Scaling
Frank Ellinger, a distinguished professor, highlighted that for decades, energy consumption in digital circuits benefited from scaling, which reduced the parasitic capacitance and supply voltage. However, this effect is now saturating.
The key to future energy savings in chip design, according to Ellinger, is adaptivity. This multi-parametrical adaptivity should ensure that only the performance truly needed is supplied.
Digital Circuits: Since peak performance is only required less than 1% of the time, systems must be performance-adaptive. This includes dynamically reducing clock frequency and supply voltage, and critically, completely or partially switching off circuits when not needed.
Analog Circuits: Analog circuits, which are always necessary for transmitting data through the air or cables, are major power consumers—for instance, 60% of power in mobile base stations is used by power amplifiers. New concepts, like pre-charging capacitors, can enable even large analog circuits to switch on very quickly (e.g., in 10 nanoseconds), allowing them to operate in sleep modes. Implementing such approaches has resulted in chipsets where the transmitter and receiver consume only nanowatts, which is low enough to be fully supplied by micro-harvesting or compact solar cells.
Architectural Evolution: 3D Integration and Chiplets
Philex Fan, whose research focuses on heterogeneous integration and chiplet architectures, elaborated on how these approaches contribute significantly to energy efficiency.
The main savings come from reducing the interconnected energy, which is dominated by resistance, capacitance, and signaling distance. By moving from chips laminated on a printed circuit board (tens to hundreds of picojoules per bit) to state-of-the-art hybrid 3D integration (tens or hundreds of femtojoules per bit), the energy efficiency can be improved by at least 10 times, or even two orders of magnitude.
However, this comes with challenges for system designers:
Reduced Voltage Swing: To lower energy consumption, the power supply voltage is aggressively reduced (e.g., to 100 millivolts in high speed), leading to robustness issues like offset deviation, crosstalk, and simultaneous switching noise.
Clocking and Synchronization: Coordinating clocking and synchronization across different heterogeneous chips is difficult.
Thermal and Power Integrity: Simultaneous switching noise impacts signal integrity, testability, yield, and reliability.
Fan advocates for using advanced packaging to incorporate multiple functional blocks (logic, memory, RF, sensors) together, which can significantly reduce redesign and porting costs from one technology node to the next. He also emphasized efficient power delivery and power management strategies, such as Dynamic Voltage and Frequency Scaling (DVFS), to reduce the required voltage supply margin and save power.
Manufacturing: The Energy-Intensive Factory
Harold Kuhn shifted the discussion to the immense energy consumption of the semiconductor fabrication process itself. A single wafer fab can use as much energy as a small city. Kuhn outlined two main areas for energy saving in manufacturing:
Saving energy without touching the process: About 50% of the energy is used by cleanroom equipment. Future focus must be placed on demanding energy-efficient equipment from suppliers.
Saving energy by touching the process: This involves replacing high-energy steps with alternatives, such as using low-temperature deposition processes instead of high-temperature ones (up to 1000 degrees Celsius). Another significant energy consumer, lithography, could be made more efficient by using the same resist for all steps and varying the lithography for areas that do not require high precision.
Kuhn also noted that the problem of increasing early failure rates in AI chips is often addressed by energy-intensive “burning” or testing. He proposed that leveraging AI-based hybrid models—combining physical understanding with data—can help understand failure modes, feed results back to the design, and ultimately avoid the costly and energy-intensive burning process.
Future Research and Cooperation
The panel also offered a look into their future research plans:
Real 6G (Ellinger): A German-Taiwanese funded project focusing on designing novel power amplifiers for 6G communications running up to 60 gigahertz. The approach uses several scaled power amplifier passes (big and smaller transistors) that automatically switch between them as the signal envelope increases. This allows the large transistor to go to sleep when the signal is low, thus reducing DC power and increasing overall efficiency.
Heterogeneous Integration (Fan): Research into efficient power delivery and power conversion strategies, as well as exploring new devices like emerging memory technologies that require less refreshing, to enable low energy consumption in complex heterogeneous systems.
Test and Reliability (Kuhn): A key area for cooperation between Saxony and Taiwan, focusing on standardizing specifications and improving testing for chiplet interfaces.
In closing, the experts underscored that solving the monumental challenge of energy efficiency in semiconductors demands bringing together interdisciplinary competencies. In other words, “collaboration” is key.