Industry Spotlight: UMC Secures Qualcomm’s Advanced Packaging Orders? Opportunities and Challenges
United Microelectronics Corp (UMC) has reportedly secured advanced packaging orders from Qualcomm, targeting AI PC and automotive CPUs. According to reports from Taiwan’s Economic Daily and Commercial Times, UMC will utilize its Wafer-on-Wafer (WoW) Hybrid Bonding technology for these orders, signaling a major step in its advanced packaging efforts.
While UMC declined to comment on individual client transactions, the company emphasized that advanced packaging is a key driver of its future growth. UMC also reiterated its commitment to building an ecosystem with supply chain partners, including Faraday Technology, Silicon Integrated Systems, and memory partner Winbond.
The Collaboration Framework
Sources indicate that Qualcomm’s Oryon architecture CPU, a 12-core System-on-a-Chip (SoC) built on TSMC’s 4nm process, will be manufactured by TSMC before being sent to UMC for advanced packaging. UMC’s WoW Hybrid Bonding technology offers a compelling alternative to TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) packaging.
“UMC’s WoW Hybrid Bonding is similar to Intel's Foveros or Samsung's X-Cube, stacking two chips or wafers together, with SRAM or DRAM above the CPU layer," explained Nobunaga Chai, a senior semiconductor analyst. “This technology enhances signal transmission and boosts chip performance without requiring an upgrade to the wafer manufacturing process.”
Cost and Performance Considerations
The WoW Hybrid Bonding method, while cheaper than CoWoS, comes with its limitations. It can only stack two CPUs together, making it less suitable for applications requiring extreme computing power, such as AI servers and supercomputers. However, its cost-effectiveness and efficiency make it ideal for consumer electronics like gaming PCs, game consoles, and AI PCs.
Industry Expertise and Capacity Challenge
Advanced packaging involves intricate processes, such as creating interposer layers with exposure machines and ultra-high-precision silicon perforation. UMC’s long-standing experience with Through-Silicon Via (TSV) technology, which it applied to AMD’s GPU wafer orders a decade ago, has positioned it well for Qualcomm’s needs.
Despite its technical capabilities, Chai raised questions about UMC’s packaging capacity, noting the absence of news regarding recent capacity expansions. “UMC needs at least one or two production lines to handle Qualcomm’s orders, but it has not announced the construction of new packaging and testing facilities," he said.
Competitors like ASE and Amkor are also equipped with WoW Hybrid Bonding technology. However, TSMC’s focus remains on CoWoS and Integrated Fan-Out (InFO) packaging for iPhones, leaving UMC, ASE, and Amkor as the main contenders for Qualcomm’s orders.
The Road Ahead
Pilot production is slated for the second half of 2025, with mass production targeted for 2026. Industry experts underscore the challenges of aligning different circuit layers through advanced packaging while ensuring sufficient production capacity.
“This collaboration highlights UMC’s advanced packaging capabilities but scaling production for Qualcomm’s high-volume needs will be the true test,” Chai concluded.
Final Thoughts
UMC’s partnership with Qualcomm signals its growing prominence in the advanced packaging landscape. As the industry races to meet the surging demand for AI and consumer electronics, the spotlight is firmly on UMC to deliver innovative solutions and scale its operations effectively. Whether UMC can navigate these challenges will determine its position in the global semiconductor ecosystem.
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